Data Conversion - signal_processing

High-speed serial ADC is JESD204 compliant

Thu, 01 May 2008 16:00:44 +0000

LTC2274’s
new high-speed two-wire serial interface greatly reduces the number of data input/output (I/O) lines
required between a 16-bit ADC and the FPGA from 16 CMOS or 32 LVDS parallel data lines to a single,
self-clocking, differential pair communicating at 2.1 Gbps

Understanding state of the art in ADCs

Thu, 01 May 2008 16:00:43 +0000

The article investigates key parameters that enable users to choose the right ADC based not only on performance, but cost and other tangible and intangible aspects of converters

Reconfigurable CMOS RF front-end for software radio

Thu, 01 May 2008 16:00:39 +0000

Designers around the world are racing to build a mobile radio that is flexible enough to handle current and future standards

Signal Processing Archive

Tue, 01 Apr 2008 16:22:53 +0000

RF Design magazine presents a collection of Signal Processing resources, and other articles related to signal processing.

Standardizing Transceiver APIs for Software Defined and Cognitive Radio

Fri, 01 Feb 2008 17:00:03 +0000

Over the past several years, numerous specifications have been developed defining the interface between the RF front-end and the baseband processing sub-systems in advanced wireless products. These interfaces include the Reference Point 3 specification developed under the open base station architecture initiative (OBSAI), the DigRF interface specification under development by the mobile industry processor

Standardizing smart antenna API for SDR networks

Sat, 01 Sep 2007 16:00:08 +0000

In addition to defining the smart antenna application programming interface (API), this article will also describe the smart antenna API in detail and explore its benefits. Plus, it will introduce the smart antenna working group and the process they are following in developing this API, as well discuss steps toward standardization.

Tackling complex signal-processing tasks for 3G LTE

Tue, 01 May 2007 16:00:30 +0000

With a significant boost in data rates coupled with much wider channel
bandwidths, 3G LTE specs will require complex signal-processing techniques
such as MIMOs, OFDMA and MC-CDMA. This report investigates solutions
that are being readied even before the standard is ratified. While semiconductor
suppliers are readying their DSPs and FPGAs, as well as front-end data
converters and RF power amplifiers, test gear providers are unveiling their
test strategies.

Converter performance approaches software-defined radio requirements

Sun, 01 Apr 2007 16:00:05 +0000

While most of the technical bottlenecks to realizing true software-defined radio can be found in the linear and mixed-signal processing components, recent trends in ADCs and DACs have moved their levels of performance one step closer to achieving that goal.

Adopting multi-antenna signal processing in wireless networks

Thu, 01 Mar 2007 16:00:22 +0000

Wireless operators are increasing their focus on data and multimedia services to drive revenue growth. This is creating demands for substantially improved radio equipment performance. Unfortunately, years of innovation in wireless have left little new technology ore to be mined for performance improvements. Multi-antenna signal-processing (MAS) software provides more control over the spatial distribution of radio energy, yielding well-proven order-of-magnitude performance improvements. As a result, MAS is being embraced as a key part of next-generation wireless networks like 3.5G, 3G-LET and W

Advanced SDR platform eases multiprotocol radio development

Mon, 01 Jan 2007 17:00:38 +0000

Combining digital signal processing with FPGA devices, this article describes a low-cost integrated hardware and software platform employing a software-defined
radio approach that expedites development of multiprotocol
radios for military, public safety and commercial applications.

Mitigating interference to maximize spectral efficiency in 3G/4G networks

Fri, 01 Sep 2006 16:00:25 +0000

With the advent of data applications, interference
is a challenge for wireless carriers. Consequently, mitigating interference to maximize spectral efficiency and improve network throughput is on the minds of operators and handset makers. This
article describes an interference cancellation technology comprising
an ASIC/core hardware and DSP-based software, which
cancels interference from all traffic channels, and from all interfering sources for 2.5G, 3G and 4G networks.

New SDR architecture enables ubiquitous data connectivity

Sun, 01 Jan 2006 16:00:24 +0000

While WiFi in the laptop has enabled unheralded mobility for many, WiFi hotspot coverage is not ubiquitous, limiting where laptops can be connected. Although software-defined radio is the right technology to stitch together these services for ubiquitous global laptop architectures make it uneconomical.

Software-defined radio poses major challenges for hardware and software developers

Wed, 01 Jun 2005 16:00:22 +0000

Software Defined Radio - To fulfill the requirements of the Joint Tactical Radio System program, lowerdissipation
FPGAs and more sophisticated DSPs must be developed to enable
migrating software programmability closer to the antenna.